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Heuristic bounds for automated logic synthesis : a heuristic method for evaluating two extremal implementations for a RT level digital system design

Resource type
Thesis
Thesis type
(Thesis) M.Sc.
Date created
1987
Authors/Contributors
Author (aut): Wu, Wuyi
Copyright statement
Copyright is held by the author.
Permissions
The author has not granted permission for the file to be printed nor for the text to be copied and pasted. If you would like a printable copy of this thesis, please contact summit-permissions@sfu.ca.
Scholarly level
Graduate student (Masters)
Subject
Heuristic programming.
Language
English
Member of collection
Computing Science Theses
Download file Size
b15030362.pdf 1 MB

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