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Displaying 1 - 13 of 13
Supersaturated designs for screening experiments and strong orthogonal arrays for computer experiments
Author:
Shi, Chenlu
Date created:
2019-08-23
Designing Shallow Trench Isolation Diodes as Electrostatic Discharge Protection for Applications in Deep Submicron CMOS Technology
Author:
Au, Thomas Chung Kin
Date created:
2013-05-24
On-chip time-domain metrology using time-to-digital converters and time difference amplifier in submicron CMOS
Author:
Lin, Chin-Hsin
Date created:
2012-01-11
Optimal factorial designs with robust properties
Author:
Lekivetz, Ryan Adam
Date created:
2011-08-11
Development of an area-efficient and low-power five-transistor SRAM for low-power SoC
Author:
Jarollahi, Hooman
Date created:
2010-06-03
Low-noise analog front-end signal processing channel integration for pixelated semiconductor radiation detector
Author:
Lin, Ming-Cheng
Date created:
2012-01-30
Analysis and design of a low-power low-noise CMOS phase-locked loop
Author:
Zhang, Cheng
Date created:
2012-01-05
Factorial designs under baseline parameterization and space-filling designs with applications to big data
Author:
Sun, Cheng-Yu
Date created:
2021-06-18
Selection between variance-optimal and bias-optimal designs when some two-factor interactions are important
Author:
Wang, Wen Tian (Wendy)
Date created:
2022-04-25
Nearly orthogonal arrays of strength three
Author:
Perera, Thellamorage Dona Darsha Kalpani
Date created:
2023-07-20
Contributions to Factorial Designs and Space-Filling Designs
Author:
Chen, Guanzhou
Date created:
2023-07-27
Construction of orthogonal designs and baseline designs
Author:
Karunanayaka Thannehelage, Ruwan Chamara
Date created:
2018-07-23
Non-orthogonal Blocked Two-level Factorial Designs
Author:
Kaur, Manpreet
Date created:
2023-07-26