Hardware platform design for validation of PMC-Sierra S/UNI® MULTI-48™

This document is a report on the design of hardware platform for the validation of PMC-Sierra's S/UNIB MULTI-4STM. The purpose of the engineering validation hardware system design is to provide a platform upon which to evaluate the quality and functionality of the device under test. The general platform requirements are: 0 Support the execution the S/UNI@ MULTI-4STM feature test plan. o Fulfill product validation requirements for all points controllable and accessible. 0 Furnish the power-supply requirements of the S/UNIB MULTI-4STM device by segregate power planes, and providing low-noise and quite supply where required. 0 Permit independent external control of all device power rails. Support product engineering's requirements for power-supply noise injection 0 System clock domains must be capable of being driven synchronous as well as asynchronously from both on and off-board sources. o Support high quality signal integrity for multi Gigahertz signals. This report describes the design of a hardware platform that supports the above mentioned requirements for the validation of PMC Sierra's S/UNIB MULTI-4STM device. It describes the challenges and the techniques that are used to overcome those challenges.