Implementation of machine learning on an innovative processor for IoT

The “Internet of Things” (IoT) is a very rapidly increasing market segment for electronics, and it holds the promise to be one of the most significant drivers for innovation in the semiconductor industry in the near future. “IoT” is providing new and different specifications to the design of embedded systems, and such specifications are likely to change the constraints that drive embedded systems design. In particular, “IoT” is introducing a wave of innovation on the design of embedded microprocessors that are the heart and soul of such systems. This report took place in the context of larger investigation on innovative embedded processor architectures for “IoT”. The work started from an existing processor design, developed in Simon Fraser University in form of a Hardware Description Language (HDL) open source library. Such processor design advantages on the RISC-V instruction set distributed since 2011 by the University of California at Berkley. This work focused on analyzing a reference algorithmic application of relevance for the “IoT” (Linear Discriminant Analysis, a well-known Machine Learning tool for data classification), that is currently being utilized in two different research projects in Simon Fraser University. This report contributed to the larger project by: 1) Porting a C version of the LDA algorithm developed for ARM cores on the newly proposed processor architecture. 2) Evaluating the performance of the LDA algorithm on the proposed architecture in terms of available data sample rates and required energy consumption. 3) Profiling the LDA algorithm on the proposed processor in order to determine the critical operation kernels that mostly affect the performance. 4) Defining the hardware configuration for the proposed processor that leads to the most efficient implementation of LDA.