In the research development of the medical nuclear imaging, the low noise performance has always been a mandatory requirement in the design of the semiconductor pixelated radiation detector system in order to achieve the high detectability of the charge signal. The noise-optimized analog front-end signal processing channel composed of the charge sensitive amplifier and the pulse shaper is used extensively in processing the radiation charge signals from the pixelated semiconductor detector. The existing noise optimization methodology only deals with the major noise contributors such as the input transistor in the charge sensitive amplifier. However, as CMOS technologies progress deeper into the submicron range, the power supply voltages are decreasing and hence, the noise contributions of the secondary noise sources such as the current source transistor in the charge sensitive amplifier are increasing. This thesis presents a noise optimization methodology for the current source transistors in the charge sensitive amplifier that will complement the existing noise optimization methodology. Using IBM 130nm CMOS technology, the proposed current source transistor noise optimization methodology has been applied to design a noise optimized charge sensitive amplifier. With the low single channel power consumption in the range of a few mW, the analog front-end signal processing channel features a noise optimized charge sensitive amplifier and a first order CR-RC pulse shaper with short peaking time. The results of the pre-layout and the post-layout simulations make the design a very good candidate for the low-power system integration. Future directions for this thesis are now being considered, which include designing the additional analog-to-digital block for the signal extraction circuitry as well as developing the complete and optimized layout for the targeted 16 analog front-end signal processing channels.
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Thesis advisor: Syrzycki, Marek
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