Resource type
Thesis type
(Project) M.Eng.
Date created
2005
Authors/Contributors
Author: Chow, Ivy
Abstract
This paper presents my work on building an FPGA emulation system for prototyping PMC-Sierra's PM8387 SXP 36x3G 36-Port SAS expander. The employment of the FPGA emulation system allows rapid prototyping of designs, concurrent hardware and firmware development, and early interoperability and performance testing. This will provide significantly higher design confidence and ultimately will reduce the number of revisions and the time to market. This paper starts by introducing the SAS and SATA technologies and describes the SAS expander's design specification. It then discusses the alternatives, benefits and the cost of an FPGA emulation system. Next it describes the emulation platform of SAS expander and outlines the entire process of implementing the emulation system, from HDL source code modification to the generation of the FPGA load. In the final sections, challenges, future developments and enhancements of the FPGA emulation platform are discussed.
Document
Copyright statement
Copyright is held by the author.
Scholarly level
Language
English
Member of collection
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